The A/B test is on Thursday and I think it would be useful to do some more real exam type question practice. So have a go a the following (submit your answers by clicking on the comment link):
14. Describe the stages of the fetch execute cycle.
Your answer should refer to appropriate buses and control lines.
(5 marks)
You might want to have a look at the diagram I used in the lesson when I taught this:
Craigmount Higher Computing 
October 5, 2007 at 9:06 am |
First, the read/write line on the control bus is activated. The desired address to read from/write to is then placed on the address bus and sent down. If it is a write execution, then data or instructions are placed on the data bus at the CPU side and the reverse for a read execution. This instruction or data is sent down the data line to the CPU or Main memory and stored or carried out/used in some way.
October 5, 2007 at 9:11 am |
The fetch execute cycle is when the CPU communicates with RAM.
For a write function, first the address bus goes to the RAM and gets the address location that the data will be written to. Then the write line takes the data to the RAM. To know to do this, the write line on the control bus is activated.
October 5, 2007 at 9:11 am |
14. Describe the stages of the execute cycle.
Your answer should refer to appropriate buses and control lines.
The address of the data to be collected is placed on the address bus, the read line of the Control Bus is activated and the data is then passed along to the data bus.
The address of the location for the data to be written to is placed on the address bus. The data to be written is placed on the data bus The write line of the control bus is then activated and the data is passed along to the main memory
October 5, 2007 at 9:12 am |
Address of data to be read is placed on address bus
Read line on control bus is then activated
Data is sent along data bus and goes to the CPU
Data is placed on the data bus
Address is placed on address bus
Write line on control bus is activated
Data is sent along the data bus to the location in memory
October 5, 2007 at 9:12 am |
here we go…
Firstly, the memory address for the next instruction is placed on the address bus. From there, the read line is activated and the data stored at the memory location is placed on the data bus which is then sent to a register, then it is executed. 🙂
I believe that’s the fetch/execute cycle 🙂
October 5, 2007 at 9:13 am |
The stages of the fetch/exectute cycle are as follows
The memory address of the instruction is placed on the address bus.
A read signal is activiated on the read lines.
The data stored at the addressed memory location is placed on the data bus and transferred to a register which holds it until it is carried out.
yeusyeus
Hail Bostin x
October 5, 2007 at 9:13 am |
This is the process by which the processor fetches instructions from memory then carries them out. The fetch part reads instructions from main memory into the processor. The memory address of the next instruction is placed on the address bus and the read line is activated. The data stored at the addressed memory location is placed on the data bus and transferred to a register which holds it until executed. The execute part interprets the instruction then carries it out.
October 5, 2007 at 9:14 am |
There are many stages to the Fetch-Execute Cycle. In order to read data from memory, the address has to be placed onto the address bus to which the read line of the control bus is activated. After this procedure, the data is placed onto the data bus which goes to the CPU.
In order to write data to the memory, the data has to be placed onto the data bus, to which the address is placed onto the address bus. Afterwards, the write line of the control bus is activated and the data is sent along the data bus to the memory location
October 5, 2007 at 9:14 am |
The CPU puts the address of the RAM location it wants on the address bus and activates the read line on the control bus. The data is then passed from RAM to the CPU using the data bus. The CPU carries out a process on the data. When the data is passed back to RAM, the address is put on the address bus, the data on the data bus and the write line is activated. The data goes to the appropriate RAM location.
October 5, 2007 at 9:15 am |
The fetch- execute cycle describes how the processor fetches instructions and then carries them out. It divides into two parts: fetch and execute. Fetch is the part of the cycle that reads the next instruction from main memory into the processor. The memory address of the next instruction is placed in the address bus and then a read signal is activated on the read lines. The data stored at the addressed memory location is placed on the data bus and trasferred to a register which holds it. Execute is the part that interprets and carries out the instructions. The processor interprets the the instruction an d then carries out the instruction.
October 5, 2007 at 9:15 am |
*A read signal is activiated on the contol bus*
🙂
October 5, 2007 at 9:16 am |
Address of memory location is placed on the address bus.
The write line is activated on the control bus so that the data is written to the location/ read line is activated so that the memory is taken from the location and put on the data bus
Data is placed on the data bus and sent along to the memory location/ data is taken from the memory and placed on the data bus and taken along to the CPU.
October 5, 2007 at 9:19 am |
The address the data that is to be read from is placed on the address bus. The read line is then activated on the control bus. The memory then accesses that location and the data in that location is then placed on the data bus. The data is then decoded and executed.
October 5, 2007 at 9:19 am |
There is lots of stages in the cycle. To read data from memory, the address has to be placed onto the address bus, which the read line of the control bus is activated. The data is then placed onto the data bus which goes into the CPU. To write data onto the memory the data has to be put onto the data bus, which the address is then placed onto the address bus. The last part of the cycle is when the write line of the control bus is then activated and the data is sent along the data bus to the memory location it is gettin sent to
October 5, 2007 at 9:20 am |
the fetch cycle reads instructions from main memory in to the prosessor. the memory addres of the instruction is placed on the address bus. then the read signal is activated on the read line. then the data stored at the addressed memory location is placed on the data bus and transfered to a register which holds it until it is carried out
October 5, 2007 at 9:21 am |
The CPU puts the address of the location that it wants on the Address Bus. The read line of the Control Bus is then activated. The data that comes from the address then travels along the Data Bus. If the CPU is puting data onto RAM it does the following. The location of the address is recieved along the address bus, the write line is then activated. The data that is required then travels along the Data Bus.
April 13, 2008 at 2:34 pm |
program counter > Memory address register
Active the read line
Memory address register > Memory data register
Add 1 to Program counter
Memory data register > Instruction register
Decode Instruction register
November 16, 2009 at 2:40 am |
first of all MAR search for the address in the memory through Address bus and data is read frome the memory.Then the contents of the memory is recieved by the Memory Data Registor through Data bus . then program counter is increment by one.Memory Data Registor transfere the data to the CIR.Accumulator recieves data frome the CIR .
February 8, 2010 at 8:19 pm |
eral line is activted
cpu put into contents